Consulting Engineer, Semiconductor Process Development
About The Position
In this critical role you will be responsible for development of wafer fabrication processes for III-V products supporting foundries in both Lowell, MA and RTP, NC. You will lead development of advanced processes for scaled device geometries, ohmic contact formation, dielectric deposition, and passivation optimization. Responsibilities include material technology development, continuous improvement, and sustaining processes all in close partnership with Device and Integration Engineering and the Technology Development group. Excellent judgment, a strong knowledge of semiconductor materials, fabrication and testing are essential to success in this role. The position reports to the Technology Development Group. This position requires a significant amount of time in a cleanroom environment. This position requires travel to both MA and NC. Candidates are expected to present complex topics to senior leadership.
Requirements
- MS or PhD degree in Materials Science, Engineering of Physics with at least 12 years of semiconductor experience.
- Demonstrated knowledge in developing advanced transistor and MMIC technologies.
- Demonstrated experience in test and process implementation.
- Familiarity with typical materials systems for semiconductors; III-V (arsenides, nitrides, phosphides) and Group IV (Si, SiGe)
- Must have a proven track record of solving technical problems, project ownership, meeting deadlines, and multitasking.
- Must have prior experience with Failure Analysis and Device Quality.
- Must know Eyelit.
- Must display a strong sense of ownership, drive and dedication to continuous improvement.
- Must possess the ability to work collaboratively with cross functional teams to improve processes.
- Excellent verbal/written communication skills, including technical writing for summarizing data and findings, writing process and equipment specifications and work instructions.
- Detail-oriented with strong organizational skills.
- Due to ITAR restrictions, must be US citizen or Permanent Resident.
Responsibilities
- Development of wafer fabrication processes for III-V products supporting foundries in both Lowell, MA and RTP, NC.
- Lead development of advanced processes for scaled device geometries, ohmic contact formation, dielectric deposition, and passivation optimization.
- Material technology development
- Continuous improvement
- Sustaining processes all in close partnership with Device and Integration Engineering and the Technology Development group.
Benefits
- Health, dental, and vision insurance.
- Employer-sponsored 401(k) plan.
- Paid time off.
- Professional development opportunities.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Education Level
Ph.D. or professional degree
Number of Employees
1,001-5,000 employees
