Circuit Design Engineer - Library

AppleSan Diego, CA
11h

About The Position

Imagine yourself at the center of our cutting-edge processor design in deep submicron technologies, and on standard cell library designs. You will drive concepts of transistor level circuit design, modeling and performance analysis, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. As a Circuit Design Engineer for the custom circuits team, you will perform the following: Work on library architecture discussion & optimization effort to improve overall Library PPA. Drive layout optimization effort by identifying & reducing parasitics to push circuit PPA. Work on Library PPA for different technology, architecture, PDK releases. Develop standard cell circuits that push design PPA. Work on PNR block to validate the IP in testchips & benchmark new tech/PDK libraries. Work on Library Characterization (Timing/Power/Variation/etc) for all libraries. Engage with CPU, SOC and GPU teams on physical design requirements.

Requirements

  • BS in a relevant field of study and a minimum of 3 years of relevant industry experience.
  • Strong understanding of CMOS device characteristics and design rules.
  • Strong understanding of Digital circuits & optimization for better PPA.
  • Good layout design knowledge & parasitic optimization in various types of layouts.
  • Hands-on experience running SPICE simulations and high sigma variation analysis.
  • Great teammate with good communication and analytical skills.

Nice To Haves

  • Experience in Circuit design of high-performance flip flops, level shifters, retention flops and other complex circuits is a plus.
  • Experience in RTL2GDSII flow and/or Static Timing Analysis (STA) is a plus.
  • Knowledge of deep submicron process issues & Finfet Technologies is a plus.
  • Understanding of Timing characterization & modeling of Standard cell circuits is a plus.
  • Strong proficiency in scripting languages like Perl, Python, and Tcl.
  • MSEE preferred

Responsibilities

  • Work on library architecture discussion & optimization effort to improve overall Library PPA.
  • Drive layout optimization effort by identifying & reducing parasitics to push circuit PPA.
  • Work on Library PPA for different technology, architecture, PDK releases.
  • Develop standard cell circuits that push design PPA.
  • Work on PNR block to validate the IP in testchips & benchmark new tech/PDK libraries.
  • Work on Library Characterization (Timing/Power/Variation/etc) for all libraries.
  • Engage with CPU, SOC and GPU teams on physical design requirements.
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