You will fit this role if: You are an expert in full-chip power integrity analysis using state of the art tools that are able to parallel process multi-billion node count designs in advanced FinFET process technologies You have demonstrated solving power integrity problems for a variety of products including 2.5D, spanning from small die with high impedance challenges to massively large chips with large power consumption and significant step load challenges You have also been involved with helping customers solve voltage budget constraints at the system level through PDN simulations More specifically we are looking for a chip power integrity expert with the following hands-on know-how: Developed innovative full-chip power integrity methodologies and flows to handle large node count designs Developed innovative power integrity methodologies to analyze and sign-off 2.5D and 3D designs Demonstrated ability to analyze and solve chip power delivery issues/challenges and provide feedback to block owners Created abstracted macro models for special macros / cells Performed power delivery network analysis using HSPICE or ADS In-depth knowledge of Redhawk-SC tool is preferred Know-how in Totem flow and CMM model creation is nice to have Familiarity with entire VLSI design flow and tools (Cadence/Synopsys/Mentor) and scripting languages (Tcl, Python) You will need to be a motivated self-starter and at ease with finding your way around the organization and across organizations within Broadcom.
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Job Type
Full-time
Career Level
Mid Level
Industry
Computer and Electronic Product Manufacturing
Number of Employees
5,001-10,000 employees