CAD RTL/DV Infrastructure Engineer

Qualcomm • Santa Clara, CA

6d

About The Position

We are seeking a highly motivated CAD RTL/DV Infrastructure Engineer to join our Qualcomm Oryon CPU team. In this role, you will work closely with RTL, DV, and DFT teams to maintain and enhance our CI/CD infrastructure, driving continuous improvement in verification flows. You will collaborate with multiple teams across geographies to ensure robust and efficient design and verification processes.

Requirements

• Strong experience with Git , GitHub , Python , and Shell scripting .
• Hands-on experience with LSF (Load Sharing Facility) for job scheduling.
• Familiarity with CI/CD tools such as Jenkins and workflow orchestration tools like Airflow .
• Solid understanding of CI/CD principles and infrastructure management.
• Excellent problem-solving and communication skills for cross-team collaboration.
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Nice To Haves

• Experience in RTL design using Verilog/SystemVerilog .
• Understanding of CPU microarchitecture concepts.
• Familiarity with verification methodologies and flows.
• Experience with Perforce for source control.
• Ability to create and maintain Splunk dashboards for monitoring and analytics.

Responsibilities

• Maintain and enhance CI/CD infrastructure for CPU design and verification workflows.
• Partner with RTL, DV, and DFT teams to optimize verification flows and methodologies.
• Drive automation and continuous improvement initiatives across the CPU team.
• Collaborate with global teams to ensure alignment and scalability of infrastructure.
• Work with EDA tool vendors to drive bug fixes and resolve tool-related issues.
• Troubleshoot and resolve issues in design and verification environments.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees