Avionics Test Engineer

E-Space•Saratoga, CA

19h•$150,000 - $250,000•Onsite

About The Position

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place! E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems. We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life. We are looking for Test Engineers to support the full test lifecycle for satellite avionics hardware. You will design test interface boards (TIBs), embed design-for-test (DFT) practices into the board design process, and plan and execute board-level testing for engineering model (EM) and qualification model (QM) builds. This role spans all 19 avionics boards across 6 subsystems and is critical to ensuring hardware quality and flight readiness.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering or related discipline.
4+ years of experience in hardware test engineering for aerospace, defense, or high-reliability electronics.
Experience designing test fixtures and test interface boards.
Proficiency with electronic test equipment (oscilloscopes, logic analyzers, spectrum analyzers, VNAs).
Strong skills in test automation scripting (Python, LabVIEW, or equivalent).
Experience with root-cause analysis and structured debugging methodologies.
Hands-on lab experience with board bring-up, rework, and instrumentation.

Nice To Haves

Experience testing satellite or spacecraft avionics hardware through EM/QM/FM qualification cycles.
Background in environmental testing (thermal cycling, vibration, shock).
Experience with JTAG-based test and debug.
Familiarity with DFT methodologies and testability analysis during design phase.
Knowledge of IPC workmanship standards and ESD-safe handling practices.
Experience with data acquisition systems and automated test equipment (ATE).

Responsibilities

Design test interface boards (TIBs) for board-level functional, environmental, and performance verification.
Embed design-for-test (DFT) requirements into the board design process from schematic through layout.
Develop and execute test plans and procedures for EM and QM board-level testing.
Develop DVP&R (Design Verification Plan & Report) documentation for each board.
Perform root-cause analysis and structured debugging when test failures occur.
Build and maintain test automation frameworks for regression and production testing.
Design test PCBs for fixtures, harnessing, and evaluation hardware.
Operate RF and electronic test equipment including VNAs, spectrum analyzers, oscilloscopes, and logic analyzers.
Perform data analysis and statistical interpretation of test results.
Collaborate with design engineers to draft test standards and improve testability of designs.
Support JTAG programming, boundary scan, and debug access for board bring-up.