About The Position

Join our IP team in Milpitas, United States, as a Senior Engineer in ASIC Development Engineering. We're looking for a detail-oriented professional who thrives in a collaborative environment and is passionate about creating high-performance semiconductor solutions.

Requirements

  • Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • Digital Design Fundamentals: Strong understanding of digital logic design, computer architecture, and finite state machines.
  • HDL Knowledge: Proficiency in Hardware Description Languages, specifically Verilog or SystemVerilog.
  • Tools: Familiarity with industry-standard simulation tools (e.g., Synopsys VCS, Cadence Xcelium, or Siemens Questa).
  • Programming Skills: Solid understanding of Object-Oriented Programming (OOP) concepts (C++, SystemVerilog OOP).
  • Scripting: Competence in scripting languages such as Python, C-shell, or Bash for automating tasks and parsing logs.
  • Soft Skills: Excellent problem-solving skill, attention to detail, and strong written/verbal communication skills to work effectively in a collaborative team environment.

Nice To Haves

  • Methodologies: Basic knowledge or coursework exposure to UVM (Universal Verification Methodology) components (drivers, monitors, scoreboards).
  • Version Control: Experience with revision control systems like Git.
  • Protocols: Familiarity with standard bus protocols (AMBA AXI/AHB/APB) or specific interfaces (DDR, PCIe, SPI) is a plus.
  • AI/ML Familiarity : Experience with or interest in utilizing AI-based tools (e.g., Github Copilot) to assist in coding, script generation, or automating verification workflows.
  • Environment: Experience working in a Linux/Unix environment.

Responsibilities

  • Test Planning and Effort Scoping: Comprehend IP architecture and design specifications and create detailed verification plans. Review with cross-functional teams and create execution plan (Gantt chart) for effort scoping.
  • Verification Environment Development: Develop a robust verification environment for IP blocks using SystemVerilog and UVM (Universal Verification Methodology).
  • Test Development & Debug: Develop directed and constrained-random tests per test plan and bring up tests. Debug simulation failures, and report bugs in bug tracking system (e.g., Jira).
  • Regression & Coverage: Run regression and analyze code and functional coverage, improve test quality to ensure 100% verification completeness.
  • IP Release Management: Participate in the IP release process, ensuring that IPs meet quality criteria for each milestone before delivery to SoC team.
  • Documentation: Document verification plans, test reports, and known issues.

Benefits

  • We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan.
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