Eridan-posted 6 days ago
$120,000 - $145,000/Yr
Full-time • Mid Level
Sunnyvale, CA
11-50 employees

At Eridan we believe in the power of collaboration and communication to achieve our mission: connect the planet to empower a sustainable, shared future . That mission is possible with our patented transmitter which decreases the cost and power required to roll out 5G by 10x when deployed globally. This is all facilitated through our offices: our Sunnyvale headquarters has big windows (even in the lab!), is walking distance to downtown and the Caltrain, and fits the entire team in the cafeteria for our frequent company parties. Learn more about our mission here . About the Role: The ASIC Verification Engineer will play a crucial role in executing a comprehensive test strategy for future ASIC development. You will be part of a team creating automated regression suites, executing verification methodologies, and ensuring seamless integration with design teams to meet critical project milestones.

  • Test Strategy & Development Collaborate with design and other verification engineers to develop and execute test strategies.
  • Write testbenches and test cases based on test strategy documents.
  • Develop and improve UVM frameworks.
  • Deliver an automated regression suite that de-risks next generation chip development.
  • Contribute to unit-level and system-level verification deliverables.
  • Become a key contributor to Eridan’s ASIC verification framework, methodology, and test automation.
  • Implement a verification environment to facilitate testing of the RTL against reference MATLAB and Python models Testing & Automation:
  • Run and automate regression tests.
  • Analyze code and functional coverage and provide actionable feedback to the development and verification team.
  • Prepare and present detailed reports on testing outcomes and verification strategies.
  • BS or MS in Electrical/Computer Engineering or equivalent.
  • 3+ years of experience in ASIC verification.
  • Proficiency in SystemVerilog for verification.
  • Strong experience with UVM frameworks.
  • Familiarity with Cadence Xcelium simulators or similar tools.
  • Detail-oriented with strong analytical and problem-solving skills.
  • Experience working on Linux-based systems.
  • Knowledge of scripting languages such as Python or TCL.
  • Knowledge of DSP algorithms and Mixed Signal systems.
  • Work on new technology that will make a significant impact on global infrastructure
  • Ability to learn, develop, and advance within a flexible environment
  • Collaborate with smart, passionate, and helpful co-workers
  • Celebrate progress company-wide
  • Pre-IPO equity
  • 401K with automatic match
  • Health, Vision and Dental insurance
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service