ASIC Methodology Engineer

Qualcomm • San Diego, CA

1d • Onsite

About The Position

As a member of the DTECH Methodology team, you will work closely with core and SOC teams to enable a state-of-the-art design analytics platform. Your work will have a consequential impact on the power, performance, area, and quality of Qualcomm’s products.

Requirements

• M.S/Ph.D. degree in Electrical Engineering or Computer Science with 1-2 years of relevant experience with ASIC/VLSI design tools and flows
• Strong programming skills in Python
• Hands-on experience with static timing analysis (STA) tools, e.g., PrimeTime and Tempus
• Problem-solving and analytical mindset
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Nice To Haves

• Critical thinking with good software architecture understanding to develop platforms at scale
• Familiarity with GenAI models (e.g., LLMs such as GPT, Liama, etc.) and their application in real-world solutions, such as chatbots, etc.
• Experience designing and developing agentic AI systems
• Experience with version control tools like Perforce or Git
• Experience with place & route tools and a good understanding of the ASIC RTL-GDSII design flow

Benefits

• We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Education Level: Ph.D. or professional degree