ASIC Intern

Hewlett Packard Enterprise • Roseville, CA

2d • $35 - $40 • Onsite

About The Position

Aruba, a Hewlett Packard Enterprise Company, is a leading provider of next-generation networking solutions for the mobile enterprise: http://www.arubanetworks.com/company/about-us. We have an exciting opportunity for a ASIC Post-Si Verification Engineering Intern to join our team in Roseville, CA. The company designs and delivers Mobility-Defined Networks that empower IT departments and #GenMobile, a new generation of tech-savvy users who rely on their mobile devices for every aspect of work and personal communication. To create a mobility experience that #GenMobile and IT can rely upon, Aruba Mobility-Defined Networks™ automate infrastructure-wide performance optimization and trigger security actions that used to require manual IT intervention. The results are dramatically improved productivity and lower operational costs.
Responsibilities: The intern will be working with the HPE Aruba ASIC development team on next generation products. You will have a summer project that will be used for/in the development activities of current or future ASIC's. This ASIC team develops state of the art, world class Networking Chips for the marketplace and our customers. We are looking for individuals that have the desire and ability to contribute at this level. The intern will be working with and learning from the senior members of the ASIC / VLSI team. Responsibilities may include RTL/Physical Design, Pre-Silicon verification; Post-Silicon verification; Formal Verification; Script &/or Tool development; schedule breakdowns, document generation, and several other possible duties. Several assignments are possible, so final alignment will be based on student skills and business needs.

Requirements

• Currently pursuing a Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering or a related technical field.
• At least 3rd Year of engineering courses completed.
• Basic programming or scripting knowledge (e.g., Verilog, SystemVerilog Python, PERL, TCL, C, C++).
• Experience with hardware design
• Strong interest in high-tech and a passion for learning.
• Excellent communication and interpersonal skills.
• Strong problem-solving and analytical skills.
• Ability to work within a team environment

Responsibilities

• The intern will be working with the HPE Aruba ASIC development team on next generation products.
• You will have a summer project that will be used for/in the development activities of current or future ASIC's.
• The intern will be working with and learning from the senior members of the ASIC / VLSI team.
• Responsibilities may include RTL/Physical Design, Pre-Silicon verification; Post-Silicon verification; Formal Verification; Script &/or Tool development; schedule breakdowns, document generation, and several other possible duties.

Benefits

• Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
• Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.
• Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

What This Job Offers

• Career Level: Intern