Our Hardware Engineering team is seeking an FPGA/ASIC Design Engineer to work with a multi-disciplined team to design, code, and verify FPGAs in our cutting-edge products in a fast-paced, process-oriented environment. Deriving requirements from higher level specifications, writing design documents, designing and implementing register-transfer-level (RTL) code using Verilog, designing with Vendor IPs and various industry standard interface protocols, use of digital simulation tools to verify designs, creation of physical design constraints for placement, timing closure and CDC, implementation of designs into target technologies using synthesis and place and route tools, perform timing analysis using static timing analysis tools, perform lab debug of designs with laboratory equipment such as Logic Analyzers and oscilloscopes, collaboration with other logic designers, board designers, software designers and ASIC designers, and communicating status to project leadership.