Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. To apply, click “Apply to Job” online on this web page. Responsibilities Leverage Design Verification experience to build IP and System On Chip (SoC) and develop innovative ASIC solutions for data center applications. They will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, they will use other approaches like Formal and Emulation to achieve a bug-free design. They will partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success. Furthermore, the ASIC Engineer, Design Verification will define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/Soc level verification, and develop functional tests based on verification test plan. They will drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. They will debug, root-cause, and resolve functional failures in the design, partnering with the Design team. They will collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality. They will also develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry. Domestic and International Travel Required 10%.