ASIC Design/Verification Engineer

Carlton National Resources, Inc.-posted 20 days ago
Full-time • Mid Level
Wakefield, MA
51-100 employees
Professional, Scientific, and Technical Services
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We are looking for an experienced ASIC Design/Verification Engineer with extensive expertise in design verification. Proficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog), along with experience in SystemVerilog Assertions (SVA) and UVM, is essential.

  • Verify ASIC designs using VHDL/Verilog and SystemVerilog with coverage-driven methodologies.
  • Implement SystemVerilog Assertions (SVA) and use UVM for thorough verification.
  • Develop and monitor verification plans, refining strategies as necessary.
  • Use scripting (Tcl, Python, Perl) to streamline verification workflows.
  • Collaborate with design engineers to debug and ensure quality.
  • 9+ years of experience in ASIC verification.
  • Expertise in HDL and HVL languages, SystemVerilog Assertions, and UVM.
  • Knowledge of industry-standard interfaces.
  • Proficiency in scripting languages.
  • Strong communication skills for collaborative verification efforts.
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