ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate, or Experienced)

Boeing • Mountain View, CA

9d

About The Position

ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate, or Experienced) Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Entry Level, Associate, or Experienced) to join us as part of our Boeing Electronic Products team at the heart of Boeing’s products; ASICs and FPGAs in Mountain View, CA . From complex digitally beamformed phased arrays for constellation satellite programs to computing and networking equipment for commercial airplanes, the Boeing Electronic Products group develops ASICs and FPGAs that are at the heart of Boeing’s products! We leverage leading-edge technology and work with world-class partners to provide some of the most complex SoCs in the world. We develop robust, high-performance custom processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. And we're applying the latest digital IC design processes with industry-best tools to enable applications that cut across every domain at Boeing. Our diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line – approximately half our design work is within the Space & Launch business unit, and half is from other parts of Boeing (AvionX; Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC/FPGA Engineer on the Boeing Electronic Products team you will develop state-of-the-art digital ICs/SoCs to support the most critical programs across the enterprise. This is a unique time where we’re hiring design and verification engineers at every level as we’re only limited by our bandwidth for new projects. We collaborate with other electronics groups across the company and around the world and support ASIC/FPGA design and verification for electronics that we build in El Segundo or for units designed at other sites.

Requirements

• Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement
• ASIC/FPGA design or verification knowledge

Nice To Haves

• Associate, Level 2: 2+ years of related work experience
• Experienced, Level 3: 5+ years of related work experience
• Master's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience
• Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog with delivery/release of production designs
• Experience with hardware emulators, especially Palladium
• Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
• Ability to executable test plans
• Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
• Ability to create self-checking and reusable testbenches from scratch
• Experience developing Functional Coverage Models and Closing Code Coverage
• Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet)
• Proficient in scripting languages: Make, Perl, Python, etc.
• Revision Control Systems: svn, cvs, git
• Proficient in Linux Environments
• Familiarity with space-based design techniques and radiation mitigation
• Demonstrated history of 1st pass success with ASIC designs

Responsibilities

• Collaborate with customers, system engineers, and hardware engineers to drive requirements capture and architect digital logic functions to meet mission/customer needs
• Explore trade-space of potential ASIC/FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance
• Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)
• Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed
• Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule
• Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation
• Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards
• Drive FPGA-based prototyping and validation depending on program and system requirements and complexity
• Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed

Benefits

• Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.
• The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level
• Number of Employees: 5,001-10,000 employees