Analog IC Design Engineering Intern (GaN)

Texas Instruments

About The Position

We can't predict what the future holds, but we know Texas Instruments will have a part in shaping it. As a GaN analog design intern you will bring focus on new GaN device design, testing and characterization. You will help benchmark and in-turn modify our device and process technology to make our customers’ visions a reality. You’ll design, characterize, model and enable productization of next generation of high voltage and optoelectronic devices, with the opportunity to work in a lot of exciting areas and with industry experts. About the Position Kilby Labs is looking for a qualified internship candidate for the position of Analog Design Engineer with focus on GaN device technology: process- and device-design, characterization, modeling, and optimization of power and optoelectronic applications. Background knowledge of device physics, compact model development, on-wafer test and measurement and data analysis is preferred. Master’s or Ph.D. (ongoing) candidates in Electrical and Computer Engineering with specialization in Integrated Devices, Circuits and Systems are preferred. Kilby represents an advanced research and product development support organization within TI chartered to define and develop new and innovative IP in collaboration with business units and customers. Kilby engineers must have the ability to approach new and/or existing problems from a different perspective in a way that results in unique, leap-frog technologies. In addition, Kilby engineers are required to take on all aspects of a project depending on project needs.

Requirements

Ph.D. degree or currently working towards a Ph.D. in Electrical and Computer Engineering. Alternatively, masters degree with 3+ years of experience
GPA of 3.0 or higher

Nice To Haves

Strong background in GaN device physics, characterization, GaN compact modeling, optical testing and GaN processing
Familiarity with GaN-process and device TCAD
Experience in semiconductor technology development, modeling, test development, device/module qualification, Verilog-A coding, lab-management
Demonstrated analytical and problem-solving skills
Course work completed in: Physics of Semiconductor Devics, Process Technology and Device design, Integrated Circuit Design (Digital, Analog, Radio Frequency and Mixed Signal), Power Systems, Power Electronics, Compact modeling
Ability to measure, quantify and come up with device solutions to improve optical performance of power devices
Ability to test and characterize devices IV, CV, BV and study parametric response to optics
On-wafer probe testing experience in both electrical and optical domains: Usage experience in handling B1500, SMUs, CMUs, probes
Experience with device simulator tools like Sentaurus, Cadence, ADS, Verilog-A
Ideal candidate must also excel at promoting new ideas, building collaborative relationships, working across organizations
Strong verbal and written communication skills
Ability to work in teams and collaborate effectively with people in different functions

Responsibilities

Design, optimize, and TCAD model power and optoelectronic devices to understand device performance and bottlenecks arising from device construction
Define and develop mixed optical and electrical test and characterization infrastructure
Take on-wafer and in-package electrical tests: IVs, breakdown and CV tests
Take optical test data: Impact of different wavelength (visible-UV) light illumination
Analyze data and quantify generation efficiency, IQE, impact of BEOL metals on optical flux
Study changes in electrical characteristics of device: V T /ID SAT /R DSON vs. optical flux
Define compact modeling requirements for such opto-electronic devices
Work with circuit designers and system engineers to understand desired device figures-of-merit to guarantee competitive advantage in customer use-cases
Come up with novel device architectures to address device and system requirements.
Perform process flow simulations and recipe-optimization to realize those device-architectures, in collaboration with the process development teams