Samsung Research America Internship-posted 1 day ago
Intern
Mountain View, CA
5,001-10,000 employees

The Samsung SOC Lab vision provides innovative SoC architecture, bus / memory subsystem, multimedia subsystems and key IP blocks for future Samsung Galaxy products (Smartphones, tablets and future devices). We are defining the high performance SoC architecture development for various Galaxy device lineups. This lab collaborates with Samsung's strategic SoC partners, Samsung MX headquarter team, and key R&D teams around the globe to innovate and reinvent technology that will positively impact millions of people around the world via the Galaxy flagship products. We are seeking a highly motivated intern to join our Memory Architecture team in 2026. As an intern, you will have the opportunity to work alongside experienced engineers to contribute to the design, development, and modeling cutting edge Memory microarchitectures and its subsystem. Strong coding skills, understanding of computer architecture and performance modeling/analysis experience are desirable for this position.

  • Develop, debug and fix Fabric and/or memory subsystem performance model, and assist in performance analysis.
  • Collaborate with senior engineers on modeling and analysis to improve model accuracy.
  • Architectural exploration by performing use case analysis using the model.
  • Document model work, analysis and the results.
  • Leverage Industry standard tools and/or create in house tools for performance evaluation and analysis.
  • Communicate the progress and results in meetings, and take inputs from seniors.
  • Currently pursuing a Master’s or PhD degree in Electrical Engineering, Computer Engineering, or related fields
  • Proficient in C or C++ programming languages
  • Coursework or experience in computer architecture, System-on-Chip, Memory Subsystem and/or interconnects.
  • Experience in microarchitecture modeling, simulation, and performance evaluation
  • Excellent problem-solving skills and the ability to work in a fast-paced, collaborative environment
  • Understanding of building blocks of Smartphone SOC (System on Chip) is a plus.
  • Familiarity with Architecure/modeling tools, SystemC hands on experience is a plus.
  • Hands on work with Gem5 is a plus.
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service