Memory Functional Validation Engineer

Intel-posted 9 months ago
$121,050 - $170,890/Yr
Full-time • Mid Level
Hybrid • Hillsboro, OR
Computer and Electronic Product Manufacturing
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We are looking for an enthusiastic engineer interested in working with Intel's latest cutting-edge memory technologies. As part of the Functional Validation (FV) Memory team, you will enable, validate, and debug the memory subsystem within Intel's client CPU products. Starting with HW accelerated emulation on through physical reference designs, your efforts help enable Memory features and speeds essential to the success of Intel's next generation of market leading client mobile and desktop processor products.

  • Defining, developing, and executing functional validation for integrated SoCs, focusing on validation of the Memory Subsystem, its interaction with other CPU functions, and system level features.
  • Apply various hardware and software level tools and techniques to ensure validation coverage and that performance goals are met.
  • Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
  • Collaborates with engineers and teams for validation, troubleshooting, and failure analysis.
  • Performs silicon debug to identify failure root causes and resolves all functional failures for memory subsystem issues.
  • Develops post silicon validation infrastructure (e.g., automation tools, validation scripts, performance and error monitors, SW checkers, features coverage, and telemetry) and test environment used in validation testing.
  • Publishes SoC validation reports summarizing all memory validation activities performed, reviews results, and communicates to relevant teams.
  • Works with architecture, design, motherboard, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications.
  • Develops content to validate memory products for compliance with industry standard memory protocols.
  • Develops tools and strategies for debug of high speed memory interfaces.
  • Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.
  • Masters in Electrical Engineering, Computer Engineering or similar field with 1+ years of related experience or Bachelors in Electrical Engineering, Computer Engineering or similar field with 3+ years of related experience.
  • Combined related experience to include: Computer Architecture knowledge, Integrated systems validation, Coding Skills either C/C++; Python, Hardware Debug Skills - Oscilloscope, Multimeter, Logic Analyzer.
  • DRAM Memory Architecture, Validation, Debug Experience.
  • BIOS/MRC development or debug.
  • VLSI Programming skills.
  • Ability to develop scripts to expedite tasks.
  • A strong analytical mind with first-rate problem solving skills.
  • Team player that can work in a high-paced, dynamic, and cross site environment.
  • Competitive pay
  • Stock options
  • Bonuses
  • Health benefits
  • Retirement plans
  • Vacation
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