Technical Staff Engineer - Emulation
About The Position
The Architecture Co-Verification team (ACOV) is an exciting, fast-paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry-leading HW emulators (such as Cadence Palladium and Protium). The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations. As an Emulation Engineer, you will be working closely with architects, hardware designers, firmware engineers, and verification teams throughout the SoC development process. This is a role for a versatile engineer that enjoys the challenges of HW/FW co-development and system-level co-verification using leading-edge HW emulators and FPGA platforms. It’s a high-visibility role that will develop a wide range of skills and exceptional problem-solving abilities.
Requirements
- BS/MS/PhD in degree or higher in Electrical/Electronic Engineering or Computer Engineering
- 12.5+ years of experience in leading FPGA/ASIC/EDA development, simulation and verification projects.
- 2+ years' experience with one or more serial storage protocols such as SAS, SATA, NVMe, CXL and thorough knowledge of the PCIe interface.
- In-depth knowledge of CXL protocols.
- Experience working with large scale FPGA solutions
- Thorough understanding of digital design, RTL coding and simulation
- Prior knowledge and experience in HDL languages (Verilog, VHDL and SystemVerilog)
- Working knowledge of C/C++, TCL or Perl/Python languages.
- Excellent verbal and written communicational skills.
- Effective team player, collaborator, and a great motivator for team.
- Ability to work in a multi-location, cross functional team
- Proficiency in lab equipment usage for test and debug
- Microcontroller programming skills are desirable
Nice To Haves
- Cadence infrastructure support and maintenance flows
- Proficient in using Agile methodologies and Bug tracking tools
- Experience with RAID HBA’s, SAS Controllers and their associated Software Testing Strategies.
- Experience with Computer System I/O hierarchies and interconnects, specifically with PCI-Express protocols and infrastructure.
- Experience with Storage IO Generators (IOMeter, Medusa, FIO).
- Knowledgeable in use of tool chains and debug tools.
- Experience with test automation, testing methodologies, and test tools.
- Isolation and resolution of complex software & firmware problems in embedded real-time systems.
- Familiarity with hardware design and implementation.
- Experience troubleshooting server system hardware and networking infrastructure to root cause issues.
- Troubleshoot and resolve complex problems in embedded multi-core real-time systems.
- Knowledge of Embedded Linux development as well as RTOS constructs including processes, threads, scheduling, synchronization mechanisms, memory management.
- Knowledge of MIPS, ARM, or RISC-V CPU architecture and firmware programming
Responsibilities
- Managing a multi-location, cross functional team of engineers and technicians
- Planning and developing a common test ecosystem across pre/post silicon
- Using Jira to plan and track project tasks and report results
- Troubleshoot and resolve complex problems in embedded multi-core real-time systems executing emulation test plans.
- Utilization of test and defect tracking tools to document and report on verification progress and product quality
- Effectively present technical information to small teams of engineers.
Benefits
- health benefits that begin day one
- retirement savings plans
- industry leading IESPP program with a 6-month look back feature
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
Ph.D. or professional degree
