Sr. ASIC Design Engineer

Micron • San Jose, CA

12h • Onsite

About The Position

As a Senior ASIC Design Engineer and domain expert, you will perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing, linting, and CDC. Leverage GenAI and agentic tools to drive efficiency and execution excellence!

Requirements

• 5+ years of proven experience
• Bachelors degree in Electrical Engineering or Computer Science related major
• Hands-on experience with GenAI, including development of agentic MCP and skill-based tools
• Proficient in EDA tools and flows, including digital design, simulation, SystemVerilog, static timing analysis, synthesis, timing closure, and top-level integration (clock and IO).

Nice To Haves

• Knowledge of AI/LLMs and machine learning, as well as PCIe, NVMe, DRAM, NAND interfaces, AXI, CPU architecture, and bus protocols, is highly desirable
• Master’s degree in Electrical Engineering or Computer Science related majors
• Familiar with APR flow, DFT, LEC, CDC, and linting
• Strong collaboration skills and a creative, problem-solving approach

Responsibilities

• Perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing, linting, and CDC.
• Leverage GenAI and agentic tools to drive efficiency and execution excellence.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Senior