Senior Staff ASIC Product Engineer

Marvell TechnologySanta Clara, CA
$118,010 - $176,800

About The Position

Marvell is looking for an extremely motivated, talented Senior Staff ASIC Product Engineer. You will become part of a dynamic product engineering team working on the most advanced semiconductor technologies. Working at Marvell is exciting with a lot of growth potential within the company. You will work closely with ASIC Design, Applications and Test Engineering teams to design, develop, debug and maintain product test solutions for our industry leading large and complex ASIC products.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
  • Good background in ATE testing on Advantest Ultraflex, Teradyne or other modern proprietary systems, test methodology development, DFT/DFM, and high-speed digital testing experience.
  • Excellent problem solving, teamwork, communication and collaboration skills.
  • An inherent sense of urgency and accountability.
  • Extensive data analysis experience and skills.

Nice To Haves

  • Mixed Signal testing is a strong plus.

Responsibilities

  • Lead debug and characterization of new ASIC product test and IP’s.
  • Help develop test strategies and plans for the most advanced ASICs in the world.
  • Develop creative solutions by looking at volume data, analyzing trends, and test lab experimentation to solve challenging yield and test problems seen on the production floor.
  • Lead optimization and continuous improvement efforts on the production test screen specification.
  • Balance business requirements to meet yield, quality, test time, and DPPM expectations.
  • Help and support RMA testing, customer facing teams, and quality and reliability teams during customer escalations to understand the issue and fix gaps identified in coverage.
  • Define yield and manufacturing specifications for various test insertions (Wafer Sort, Final Test and System level Test).
  • Play a lead role in test flow optimization and test time reduction.
  • Work with design and DFT/DFM groups to define and enhance yield and test methodologies.
  • Play a key role in new product qualification before volume production as well as new package/fab qualifications.

Benefits

  • employee stock purchase plan with a 2-year look back
  • family support programs to help balance work and home life
  • robust mental health resources to prioritize emotional well-being
  • recognition and service awards to celebrate contributions and milestones
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