Senior SoC Power Management Architect

Intel•Hillsboro, OR

3d•Onsite

About The Position

Join our Silicon Architecture team to drive power-efficient SoC architecture and system-level innovation for next-generation client and AI computing platforms. We are seeking a Senior SoC Power Management Architect to join our Silicon Architecture team within the Client Computing and Physical AI Group. This role focuses on defining and developing cutting-edge System-on-Chip (SoC) architectures with emphasis on power management, performance optimization, and energy efficiency for next-generation computing platforms. You will collaborate across architecture, design, validation, and product teams to deliver scalable solutions from concept through high-volume manufacturing (HVM).

Requirements

Bachelor's Degree in Electrical, Computer Engineering or a related field and 8+ years of experience. Or a Master's degree in the same field and 5+ years of experience or PhD in the same filed and 3+ years of experience.
SoC architecture principles and design methodologies.
SoC architecture definition and development.

Nice To Haves

Background knowledge of SOC architecture and power management architecture.
Experience in SoC architecture definition and development.
Power management feature definition and development experience.
Silicon level data collection and analysis skills and experience.
Debug skills and experience.
Software development and scripting skills.

Responsibilities

Define and develop SoC power management architecture to optimize performance, efficiency, and thermal behavior
Maintain a system-level perspective, ensuring alignment between product goals, constraints, and implementation
Evaluate design trade-offs and define feature requirements, specifications, and architecture solutions
Drive power integration strategies across new and existing IP blocks
Partner with hardware and software teams to ensure successful execution, validation, and enablement
Support the full product lifecycle, from early concept through silicon bring-up and production
Analyze post-silicon power/performance data to identify optimization opportunities for current and future generations
Contribute to debug, root cause analysis, and continuous improvement efforts